In a conventional metal oxide semiconductor field effect transistor (MOSFET), the source, channel, and drain structures are constructed adjacent to each other within the same plane. Typically, a gate dielectric is formed on the channel area and a gate electrode is deposited on the gate dielectric. The transistor is controlled by applying a voltage to the gate electrode, thereby allowing a current to flow through the channel between source and drain.
An alternative to methods of building planar MOSFETs involves the construction of three-dimensional MOSFETs, in the form of a multi-gate transistor such as a dual-gate field effect transistor (FinFET) or a tri-gate transistor field effect transistor, as a replacement for the conventional planar MOSFET.
Three-dimensional transistor designs such as the FinFET and the tri-gate field effect transistor allow tighter packing of the same number of transistors on a semiconductor chip by using vertical or angled surfaces for the gates.
The gate electrode is commonly formed on the gate dielectric using a doped polysilicon layer, one or more metal layers, or a combination of polysilicon and metal layers. The gate electrode may be capped with a dielectric layer to mask and protect the structure during front-end processing. The width of the gate electrode structure and regions of isolation between the gate electrodes is commonly miniaturized to provide a greater density of gates per unit area. Deviations in the gate structure may lead to reduced device performance or operational failure of one or more transistors.